1. Technical Field
The present disclosure generally relates to power converters.
2. Description of the Related Art
DC/DC converters are a type of power supply which converts an input DC voltage to a different output DC voltage. Such converters typically include a transformer that is electrically coupled via a switching circuit between a voltage source and a load. Converters known as forward converters include a main switch connected between the voltage source and the primary winding of the transformer to provide forward power transfer to the secondary winding of the transformer when the switch is on and conducting. A metal oxide semiconductor field effect transistor (MOSFET) device is typically used for the switch.
Power converter designs are often constrained by various requirements, such as efficiency, input voltage range, output voltage, power density, and footprint area. These constraints require certain performance tradeoffs. For instance, achieving higher efficiencies may require a more narrow input voltage range. To further improve efficiencies, active-reset schemes and synchronous rectifications are often employed. These synchronous rectification schemes can either be active-control or self-driven.
A limitation of forward converters is that it may be necessary to reset the transformer core to prevent saturation (i.e., discharge the magnetizing current of the transformer during the off period of the main switch). This limitation results from the unipolar character of the transformer core excitation. Techniques exist for resetting the transformer of a forward converter. One such technique is to include a resistor-capacitor-diode (RCD) network in parallel with the primary winding. The RCD network clamps the voltage on the switch to the minimal peak voltage consistent with a given source voltage and switch duty cycle, thereby eliminating the need for dead time while allowing for a wide range of duty cycles. This tends to reduce the voltage stress applied to the switch. Nevertheless, this transformer resetting technique reduces the efficiency of the converter due to the dissipation of the magnetizing energy accumulated in the transformer during the on period of the switch. Instead of being recycled, this magnetizing energy is partially converted into heat by the RCD network.
Another method of transformer resetting is to use a series connection of a capacitor and an auxiliary switch connected across the transformer winding either on the primary side or on the secondary side (referred to as an “active clamp” or “active reset”). When the main switch is turned off, the auxiliary switch is turned on, and vice versa. Thus, magnetizing energy in the transformer is transferred to the clamping capacitor, and the clamping capacitor resonates with the magnetizing inductance to maintain the necessary level of reset voltage. This active clamp reset provides non-dissipative reset of the transformer and minimal voltage stress on the main switch under steady state conditions as dead time is almost zero. For this reason, the active clamp method is compatible with self-driven synchronous rectification.
In switching power supply circuits employing synchronous rectifiers, the diodes are replaced by power transistors to obtain a lower on-state voltage drop. The synchronous rectifier generally uses n-channel MOSFETs rather than diodes to avoid the turn-on voltage drop of diodes which can be significant for low output voltage power supplies. The transistors are biased to conduct when a diode would have been conducting from anode to cathode, and conversely, are gated to block current when a diode would have been blocking from cathode to anode. Although MOSFETs usually serve this purpose, bipolar transistors and other active semiconductor switches may also be suitable.
In these synchronous rectifier circuits, the gate signals can be self-driven, i.e., the gate signal can be tied to the power circuit, or controlled-driven, i.e., the gate signal is derived from some point in the circuit and goes through some active processing circuit before being fed to the MOSFET gate driver. In a power converter, the synchronous rectifier which conducts during the non-conducting period of the main power switch (switches) may be referred to as a freewheeling or “catch” synchronous rectifier. The synchronous rectifier which conducts during the conducting period of the main power switch (switches) may be referred to as a forward synchronous rectifier.
FIG. 1 shows conventional synchronous rectifiers in a forward converter 10. In this example, a DC voltage input Vin is connected to a primary winding 12 of a transformer T by a MOSFET power switch Q1. A clamp circuit arrangement is also provided to limit the reset voltage. In particular, the MOSFET power switch Q1 is shunted by a series connection of a clamp capacitor Creset and a MOSFET switch device Q2. The conducting intervals of Q1 and Q2 are mutually exclusive. The voltage inertia of the capacitor Creset limits the amplitude of the reset voltage appearing across the magnetizing inductance during the non-conducting interval of the MOSFET power switch Q1.
A secondary winding 14 of the transformer T is connected to an output lead Vo through a synchronous rectifier including MOSFET rectifying devices SR1 and SR2. Each rectifying device SR1 and SR2 includes a body diode. With the power switch Q1 conducting, the input voltage Vin is applied across the primary winding 12. The secondary winding 14 is oriented in polarity to respond to the primary voltage with a current flow through an inductor Lo, through the load RL connected to the output lead, and back through the MOSFET rectifier device SR1 to the secondary winding 14. Continuity of the current flow in the inductor Lo when the power switch Q1 is non-conducting is maintained by the current path provided by the conduction of the MOSFET rectifier device SR2. An output filter capacitor Co shunts the output of the converter 10.
Conductivity of the two rectifier devices SR1 and SR2 is controlled by SR gate drive logic 16 which may receive signals by a primary active-reset pulse-width modulated (PWM) controller 18 via isolated feedback and synchronization logic 20. The active-reset PWM controller 18 may include, for example, one or more oscillators, comparators, and/or flip-flops. The output of the PWM controller 18 provides a PWM drive signal to the main switch Q1 and the auxiliary switch Q2.
The active-control methods like the one shown in FIG. 1 often require more complex circuit design and greater part counts, which may increase cost and product size. In particular, active-control typically requires secondary synchronization with the primary controller. Such synchronization may require an isolated feedback, which may require many more components and an increase in footprint. For hybrid converters, minimizing part count and footprint may be critical to achieve high power density.
With the self-driven methods, the driving signal is generated using discrete components and/or extra transformer windings which produce the necessary signals for driving the synchronous rectifying devices.
For example, FIG. 2 shows a schematic diagram for an active-clamp forward power converter 30 which includes self-driven synchronous rectification. In this example, the MOSFET rectifier device SR1 is coupled to one node 32 of the secondary winding 14 of the transformer T via a gate resistor 34, and the MOSFET rectifier device SR2 is coupled to another node 36 of the secondary winding of the transformer T via a gate resistor 38.
Self-driven rectification schemes such as that shown in FIG. 2 are frequently used to decrease design complexity, but they have several limitations. In particular, the input voltage range is relatively narrow for a given output voltage. For example, a design that requires an input voltage range ratio which is greater than 3.13 may be challenging, especially for a design which can scale the output voltages from 3.3 V to 15 V without extra transformer windings. In fact, to scale the output to 15 V, the self-driven scheme may require a tertiary winding 52, as shown in the active-clamp forward converter 50 of FIG. 3. This limitation becomes more problematic as the input voltage range ratio increases beyond 3:1.
These conventional self-driven methods have several drawbacks, but such drawbacks are not limited to the gate drive voltages. For a given output voltage and input voltage range, the transformer ratio should be calculated properly so that the catch synchronous FET has sufficient gate voltage to fully enhance at the highest line but not to exceed the maximum gate voltage rating at the lowest line, and it should be ensured that the forward synchronous FET has sufficient gate voltage to fully enhance at the lowest line but not to exceed the maximum gate voltage at the highest line.
These two contradictory requirements between the forward and catch synchronous FETs make it difficult to achieve a wide input. As such, the input voltage range is usually compromised and has be made more narrow until the desired output voltage is feasible with the required transformer turns ratio. A potential mitigation to provide sufficient gate voltage for full enhancement of the FETs while not exceeding the maximum gate-source voltage (Vgs) rating would be to clamp the gate voltages when Vgs is at its highest value. Zener diodes are typically used for this purpose but the power losses in them are not desirable since the primary purpose of synchronous rectification is to minimize losses in the secondary switches.
FIG. 4 shows schematic for an active-clamp forward converter 100 which uses a technique for self-driven synchronous rectification that includes summing the forward and reset voltage on the primary winding. Primary input voltage is provided at 101 to one side of a primary winding 103 of a transformer 102. Coupled to the other side of the primary winding 103 are a capacitor 107 and a main switch 109. An auxiliary switch 108 is connected to the other side of the capacitor 107 and to the other primary input voltage leads 111. The main switch 109 also connects to the other primary input voltage lead 111. Gate drive for switches 108 and 109 is provided at 110 and 112, respectively, and consists of appropriate out-of-phase drive signals which alternately turn on and off the switches 108 and 109 to produce an alternating current in the primary winding 103 of the transformer 102.
A secondary winding 104 of the transformer 102 has two synchronous rectifiers, a switch 114 and a switch 115, which are driven by circuitry described below so as to conduct at appropriate times to rectify the voltage waveform produced across the secondary winding 104. An output inductor 113 and an output capacitor 116 act to smooth voltage and current variations in the output current and voltage respectively. A resistor 118 and a capacitor 117 are illustrative of loads on the power supply, while a secondary side ground reference point 119a is coupled to the loads.
Tertiary windings 105 and 106 of the transformer 102 produce the driving voltages for the synchronous rectifying switches 114 and 115. Voltage pulses produced at the windings 105 and 106 due to the variations in current in the primary winding 103 are passed through capacitors 120 and 123, respectively, to the gates of the switches 114 and 115, respectively. Diodes 121 and 124 provide a current path during the reverse voltage cycles of the windings 105 and 106, while the resistors 122 and 125 ensure that the gates of the switches 114 and 115 will be turned off when no driving voltage is present. A secondary side ground reference point 119b may be conductively continuous with the ground reference point 119a. 
For active clamp forward converters like the converter shown in FIG. 4, a common technique for self-driven synchronous rectification is by summing the forward and reset voltage on the primary winding. The idea is to provide a relatively constant voltage over line variation, which is desirable. However, the method requires a few trade-offs that may offset that advantage. In particular, the summation requires at least two additional timing circuitries on the secondary side, one for each of the synchronous switches 114 and 115, in addition to the one timing setting required on the primary side. Unfortunately, the timing circuitries on the secondary side are dependent on the line and load variation, so that no single optimal timing values can be set to cover the entire input voltage and output load ranges. Errors in the timings will potentially cause shoot through current and consequently may limit the operating frequency to at most 300 kHz. These methods convert a bipolar signal into a unipolar signal. A potential drawback of this is a shoot through current for a sudden stop in which both synchronous FETs are turned on at the same time continuously for ten or more cycles, essentially creating a short circuit across the output.